Emitter coupled logic - ECL family

emitter coupled logic

emitter coupled logic

Basic of Logic Family

Logic Family is Monolithic Digital Integrated circuit which is in group of the Logic gates Construction using the several different design.

Many Logic family' s different components each contains one or more basic Logical functions.

This all the different small components are used to build up more complex Integrating circuits.

In This Logic Circuit some of Static Technique is used to minimize design complexity.

Some of other technique like clocked dynamic techniques is used To minimize size, power consumption and delay.

Logic family is indicated that Type of logic circuit is used in the IC.The main type of Logic circuit are below,

  • TTL(Transistor Transistor Logic)
  • CMOS  (Complementary MOS)
  • ECL (Emitter Coupled Logic)

emitter coupled logic definition

Hi Hello Guys , You are here that means you are so exciting about know the principle of the Emitter coupled logic.

Here we represented some of the all the basic funda and detail information about the emitter coupled logic - ECL family.

So Without wasting of your time i am starting the full detailed article about the Emitter coupled logic.

What is electronics switching devices ?

It is also used in the electronics and electrical engineering which deals with the design, control, computation and integration of nonlinear, time-varying energy-processing electronic systems with fast dynamics.

Many time ago in Electronics device mercury arc valves are used. but today modern time in the electronics switch some of the Diodes , transistor, thyristors are used.

Mostly these type of switch used in the AC/DC converter (rectifier).most of all the these device are used in the electricity transmission and its control process.

For more detail guide of Basic of electronic switching devices

Which is Fastest electronics device ?

You all are know that the MOSFET is the fastest switching devices.

Simply we called MOSFET in electronics Language then it is the metal oxide semiconductor field effect transistor.

It has Some of the ability to the change conductivity by the amount of the applied voltage.

Mosfet is the four terminal devices.they are like Source(S) , Gate(G) , Drain (D) and Body (B) terminals.

If you check in the electrical circuit then only appears three terminals.

For more detail guide on fastest electronics switching device mosfet

Basic Of  Emitter coupled logic(ECL)

In electronics family Emitter coupled logic (ECL) is the high speed integrated circuit bipolar transistor.

ECL is used as overdriven BJT differential Amplifier.It has single ended input and Limited emitter current to avoid from the saturated region of the operation.

And its has slow turn off behavior.

Here current is flow in two legs of emitter coupled pair.ECL is also sometimes called as the current steering logic (CSL) , Current mode logic (CML) , current switch emitter follower (CSEF) logic.

We already talk that Transistors are never in saturation region , its input and output voltages have very small swing like 0.8.

We all know that its input impedance is high and its output impedance is low.

You know that transistor is switching device and transistor is quickly change its state.

Its Fanout capabilities is high.it is essentially constant current draw of the differential amplifiers.

It is the decrease the propagation  time of the whole circuit by reducing inverter count.

If you ask about different electronics switching devices like Mosfet , IGBT , Transistor , GTO , Diac , Triac etc..

IF you curious to know about the MOSFET as the Fastest switching devices then go for .....

Speed of operation of logic family is measured by the delay of its basic gate rise and fall time of output waveforms.

Exact value of this time is also given in the this article.Here in the emitter follower circuit rise time of output signal is shorter than its fall time.

It is provide the output current required to the charged up the load and other parasitic capacitances.

Here the signal at the base of the emitter follower is falls and emitter follower is cut-off and then load capacitances is discharge through the both the combination of the load and the pull-down resistances.

If we get some of the additional high speed of the operation with the ECL circuit then interconnection of the various logic gates in a system is required.

ECL circuit is used where the signals whose rise times may be 1 ns or even less.

History of emitter coupled logic(ECL)

Emitter coupled logic was invented in August 1956 at IBM by Hannon s.Yourke.Its also called as current-steering logic.Its logic also called as current mode circuit.

It is also used in the make ASLT circuit in IBM.

In this differential amplifiers Whose input logic levels were different from the output logic levels.

In the beginning of the  1960 ECL circuit were implemented on monolithic integrated circuits.

First Monolithic circuits is Introduced by the Motorola in 1962. Also Motorola developed several improved series in 1966.

Which has 1 nanosecond gate propagation time and which has 300 MHZ flip-flop  toggle rates.

The ECLinPS family is introduced in the 1987.

Now we talk about the GATE delay then 500 ps single gate delay and it has 1.1 GHZ flip-flop toggle frequency.

ECl has High power Consumption So its used is mainly for the High speed requirement.

Basic Circuit Diagram of emitter coupled logic(ECL)

emitter coupled logic tutorial

positive emitter coupled logic

image credit wikipedia  

                                                           emitter coupled logic circuit

ECL is devised which is based on the emitter coupled pair.For The Detail Shown in the above figure.

Shown in figure that left half of the pair which has two parallel-connected input transistors T1 and T2.And Input NOR Logic is used.

Shown on figure that on the right T1 And T2 Transistor T3 is provided which based voltage is fixed by a reference voltage source.

In shaded light green voltage divider with diode thermal compensation (R1,R2 and D1,D2) And also buffering emitter follower.

Emitter voltage is kept relatively steady.Re is the common emitter resistance which work like current source.

output voltage of the collector load here resistors Rc1 and Rc3 are shifted, He is buffered to the inverting and non-inverting outputs by the emitter follower T4 And T5 transistor.

Here shown in figure that output register of emitter is Re4 And Re5.these both of are do not exist in the all the process of the ECL.

Sometimes 50 Ohm resistor is connected between bases.

How does emitter coupled logic work

Operation principle of emitter coupled logic (ECL)

Now lets talk about 
working principle of emitter coupled logic.

Emitter coupled logic is fastest switching logic among the all the switching logic family.

Its Also Known As current mode logic (CML)

Emitter coupled logic is also called CML because of the in ECL operation current switching is used.

Its has fixed biased emitter current.

which Approximate value is Ie=3mA

its path is from 1 collector terminal to another terminal of the transistor.

And its depend on the apply input logic level.

In the ECL circuit total two transistors.

Q1  And Other is Q2 for the differential Amplifier portion of the inverter circuit.in the base terminal of the Q2 transistor we apply the reference voltage  +Vref And At the base terminal of the transistor Q2 we apply input Logic level voltage.

Here Vi=-1.7 v  which is indicated that the Logic 0 at the input terminal or the base terminal of the transistor.

Ie is flow through the Collector terminal of the transistor Q2 For the logic 0.

Now we apply the Logic 1 at the input terminal then the Ie is flow through the collector terminal of the transistor Q1.Its flowing path is depend on the the input logic level.

Characteristics Of emitter coupled logic

Now We talk about the characteristics of the emitter coupled logic then In ECL family large current requirement is approximately constant.

this is not depend on the state of the circuit.

This means that the ECL circuit generate little power Noise.This power Noise can become problematic.

In other application like in cryptographic applications , ECL circuit is less susceptible to side channel attacks such as occur in the differential power analysis.

Propagation time in the ECL circuit is very less in term of the nanosecond.

ECL has been the always fastest switching device.

If required High speed performance processors then which is based on the Multi-chip ECL CPU.

Power Supplies Logic for the emitter coupled logic

Normally emitter coupled logic will operate on the negative power supplies and its positive of the supply is connected to the ground.

this is used to mainly minimize the influence in the power supply variations on the logic levels we know that the ECL is more sensitive to the noise.

Due to the ground is the most stable voltage system so ECL is operated on the positive ground system.

And in Case power supply variation voltage drop across collector resistors change slightly.

Due to collector resistors "tied up" to ground, output voltage moves slightly.

If we ground the Negative end of the supply then Collector resistors are attached to the Positive rail.

If constant voltage drop across the collectors register are change slightly and then output voltage are follow some change in supply variation.

Here voltage Divider R1-R2 are used to compensates the voltage variation.

If we use Positive Power supply then Its has Disadvantage Like its Output voltage is vary slightly according to the backward high constant voltage.

Main another reason for the using the negative supply is the protection of the output transistors form the accidental short circuit between output and the ground terminal.

Here we take proper care for the choosen the supply voltage so that required value of the current is flow from the diode D1 And D2 .

And then Voltage Drop across the Common emitter resistor Re is became the adequate.

If we want interoperation between ECL circuit with the another Logic family circuit like TTL then required additional interface circuits.

In the ECL circuit different between Low and High levels are very low so they are relatively very close that means ECL is fases some small noise margin ,which can became the troublesome.

Features of the Emitter coupled logic(ECL)
(Advantage of emitter coupled logic)

Its name is emitter coupled logic because of the emitter of the BJT's are connected together.

transistors never saturated.transistor are prevented from going saturation by choosing the logic levels close to one another.storage delay in ECL circuit is eliminated.

the logic levels are normally -0.8v (logic 1) and -1.70v (logic 0)

Here propagation delay is minimum so speed is high.it has the fastest switching speed among the all other logic families.its propagation delay is around 1ns.

Due to low output impedance, fan out is large,fan out of ECL is around 25.You show that in the output side emitter follower circuit.
this emitter follower circuit is provided low output impedance,like value is 5 to 10 Ohm.

Fan out is around 25 that means our ECL logic circuit can try total 25 similar logic gates.

ECL logic circuit produces an output and its complement.this is eliminates the need of the inverters.

In case of ECL logic circuit we have 2 output terminal one is normal output and other is its complement so in the ECL logic circuit we don't need any inverter for the complement of the output.

current through Re is more or less constant.so no noise spikes will be generated like those produced by TTL totem-pole circuits.

 Disadvantages of emitter coupled logic(ECL)

  • Having logic levels close to each other , it has low noise margin around 0.25 v.so ECL circuits are not suitable for heavy industrial environment.

in ECL logic level Apply -0.8v  for the logic 1 and -1.7v for the logic 0.So different between two logic is only 0.8v so ECL circuits are get easily effected by the noise.

so instead of the ECL in large industrial circuit HCL (high threshold logic circuit) is used.which is give better immunity.

  • It requires relatively large silicon area and high cost.

In the ECL circuits has several BJT's and register.for this register required large silicon and due to large amount silicon its cost is became too high.

  • High power dissipation, Pd= 40mw

  • Due to high current, there is a problem to dissipates heat due to I^2R drops.

here Ie = 3mA and used some register in range of the 300 Ohm to 1K ohm so we get the several I^2 R drop in the circuit.this is the critical problem in the ECL circuit.

  • the ECL input and output are not electrically compatible for direct connection with any other logic family due to negative supply voltage and logic levels.

Advantage of emitter coupled logic over the CMOS

If we talk about speed of emitter coupled logic then it is higher then the previous RTL and DTL.

Smaller package compare to the RTL and DTL.

In emitter coupled logic circuit its output is depend on the current and last input(memory).

Emitter coupled logic is used for the fastest logic family work.

We talk about life then emitter coupled logic life is long , long obsolete.

Only one major disadvantage is its has very high power consumption.

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Why emitter coupled family works on negative supply voltages? 

Normally emitter coupled logic circuit are work on the both positive and Negative supply.Main reason for the use of the Negative supply is the due to convention and ease of use in early day of the emitter coupled logic.

In the ECL circuit if the output is high voltage then written as Vcc-Vbe.And if output is low voltage then written as Vcc-Vbe-Vgate.

Vbe = base emitter voltage

Vbate = voltage swing of ECL gate

Its voltage level is change with the Vcc change.but buse as Vcc as the reference and use ground.So here Vee is became negative supply.

Vcc is drop out in all the levels because of the Vcc is ground and define as the its zero volt.

In the other convection process we also take Vcc is as positive and Vee is as ground.this connection is also called as PECL.

How Emitter coupled Logic ( ECL ) is different from the TTL Logic ?

emitter coupled logic is referred to as the Current Mode Logic.In the ECL logic Extremely very high speed digital technology is used.

ECL has the very low propagation time, which is in nano second.propagation time in between 0.5 to 2 ns.

So ECL is much faster than the TTL.Power dissipation in the ECL circuit is 3 to 10 times higher than the TTL circuit.

Output Logic of ECL which is varies from the LOW state to the HIGH state.

Voltage level of the ECL and those TTL are much different.Output swing of the ECL  gates are varies from the LOW sate -1.75 volts to HIGH state as -0.9 volts.

Now if we talk about the Modern Popular commercially available ECL then there are two types of Devices available ECL 10K and ECL 100K.If ECL is 100K delay then its has Gate delay of 0.75ns and it is dissipates the about 40 mW/gate.

And delay–power product of 30 pJ.Here we see that its power dissipation is relatively high.100K series provide the shortest available gate delay.

ECL 10 K is slightly slower,its Gate propagation is 2 ns and power dissipation is 25 mW for a delay–power product of 50 pJ.

Overall 10K series is easier to use.

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For get more detail please refer below video lecture..

Final Words :

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  2. ECL has been proved to be extremely fast with same logic density as CMOS whereas SiGe HBT has been proved to be very cold. ECL performance gain would be coming from the ever rising frequency that, owing to the differential amplifier, has nothing to do with TDP. Field-effect transistor miniaturization is pointless because smaller FETs have slower discharge, hence lower overall speed of the logic gate. 32-nanometre Silicon-Germanium Heterojunction Bipolar Transistor works at 782 GHz (at room temperature) and on the same performance level it will be cheaper to manufacture than equivalent FinFET. At, say, 8.5 GHz CPU frequency, Emitter Coupled Logic should dissipate 17 times less heat as compared with CMOS. ECL has better speed/power ratio than that of CMOS. Emitter-dotted differential-cascode technique can provide very high speeds to as many as 50 or more fan-ins. The capability to drive terminated transmission lines is a major ECL strength, allowing higher system performance than would be possible with unterminated signal lines. Another ECL benefit is that both true and complement outputs are simultaneously available. Like terminated lines, complementary outputs can be used to improve system performance. The availability of complementary outputs considerably simplifies logic design with ECL.